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Specification

The PoETec members are defining and adopting interface specifications to enable rapid deployment of IEEE® 802.3 Power over Ethernet standards based equipment. The PoETec consortium will make its interface specifications available for public download and will provide implementation rights to all suppliers and system vendors who join the consortium. Members also have access to the draft specifications and participate in their development.

The PoETec interface specifications will includes:

• Asynchronous Layer 2 Interface - This specification addresses a logical two wire full duplex interface operating at bit speeds less than 2 megabits per second. The data is framed in byte oriented fashion and transmitted with start and stop signals per byte. One logical wire in the transmission direction and one logical wire in the receive direction allows for full duplex operation of the logical link. Depending on the physical interface implemented (IEA232, EIA284 or TTL) three or four physical connections are supported.
• Synchronous Layer 2 Interface - This specification addresses a logical two wire half duplex interface operating at bit speeds less than 2 megabits per second. Two signals, one for data/address exchange and one for clocking comprise the logical link. Only a three wire, 3.3V, non-isolated physical interface is specified. This interface is largely compatible with the Phillips Semiconductor I2C interface specification. (NOTE: At this time, Phillips is NOT a member of the PoETec Consortium; some portions of this interface may be subject to their IP terms and conditions.)
• Layer 3 Interface - This specification defines a message set to operate Power Sourcing Equipment (PSE) functions operating over either of the above Layer 2 Interfaces. In addition, support for management operations such as configuring the interface or exchange of manufacturer specific information is supported.
• 168 Pin PSE Module Interface - This specification defines the logical feature sets, pinout and signal levels for a 24 PSE function. The physical dimensions of the specification are consistent with JEDEC specification MO-161 so that low cost memory "DIMM" connectors can be used to interface with the module. This 168 pin module builds on the Layer 3 and Layer 2 PoETec specifications.
• Modular Connector Block PSE Module Interface - This specification defines the logical feature sets, pinout and signal levels for a family of modular ("RJ-45") connector blocks. While defining the connector block physical outline, pin location, etc, the specification builds on the Layer 3 and Layer 2 PoETec specifications above.
• MIB Interface - The specification develops Powered Device (PD) and Power Sourcing Equipment (PSE) MIBs for use by SNMP and is consistent with other SNMP objects, standards and conventions. The MIBs build upon and expand those defined by IETF RFC 3621 and will be harmonized with any updates produced by the IEEE P802.3at Task Force or IETF Ethernet Interfaces and Hub MIB (hubmib) Working Group.

Organizations interested in joining the PoETec Consortium and developing these standards should visit the PoETec Membership page.